I managed to compile CoreNG for SAMG without errors (pretty sure it is not compatible with FW yet). Now I created new target in RRF and trying to compile it. I have a question about SD card support. Has the RRF used SD card support from beginning? I'm asking because SAMG can access SD card only through SPI. Is there some way how to completely disable storage?

Due to minimum of free pins on SAMG the optimal situation would be to disable SD support and write the configurations into the code. I'm considering what will be the easier way to get it working. Should I rewrite the SD card driver so RRF can use it as now does, or rewrite RRF not to use the SD at all?

David, thanks for an answer. Good to hear that ASF is not used for critical code. Do you have any particular project in mind for the CoreNG? I found two which I may start with, but you might know about better one:)

https://github.com/aethaniel/ExperimentalCore-sam
https://github.com/ultimachine/FeynmanCore

Hello,

I would like to port the Duet FW to SAMG55 and I have some questions about the structure and tools to use it. It may be placed in Future view forum, but there are no topics so I choosed this one. The questions are for developers anyway.

So my goal is to use another platform (Atmel SAMG55). I have done initial research that I can fit a printer on this chip witch few modifications.

For me as newbie in RRF is kind of hard to understand the structure of the project. My guess is that's just because of historical reasons. Is there any document describing where are located particular components and why? This is what I found about RF so far. Whole thing is separated in two projects. CoreNG and firmware itself. CoreNG contains HW specific code and it is mashup of Arduino and ASF functions. What surprised me is there is also HW related configurations in firmware as well. This is the point where My first question comes from.

1. Are you guys planning to continue in this structure, or do you have some plans to merge it in one project and change the structure? Please do not think I'm saying the structure is bad and should be changed. I know it is hard to maintain project about this size:) I saw you guys are working hard on implementing freeRTOS which is great. But due tho this I assume you are pretty busy and don't have much time for this. If you are thinking to change the structure or to cut out some libraries (Arduino), it would be really beneficial for me to know, because than I can make the port according to your new concept.

2. Could you give me some advice about porting it to new chip? At best I would like to avoid using Arduino and ASF, but I know it is not quite possible. After some initial tests I have done with G55 I found using ASF slow things down about 20% and I think it would be the same with arduino. By this question I'm asking about some tips how to do the port most clean and quick way. Because you know the structure best.

3. I was able to build the firmware with Eclipse, but found it quite complicated when it comes to debugging. I tried to import packs with register view, but I have no success yet. Atmel studio has nice interface for register view and so. BUT. When I tried to load the coreNG project into Atmel studio it was slow as hell. I was not able to scroll down the code and it was just horrible. So. How do you debug the firmware in eclipse? Or do you use another environment for development?

Many thanks for your time and sorry about that long post:)